1. Field of the Invention
The present invention relates to an integrated circuit design apparatus, an integrated circuit design method and an integrated circuit design program for designing an integrated circuit.
2. Description of the Related Art
In recent years, the shortening of design time for integrated circuits is demanded with diversification of products. To shorten the design time of an integrated circuit, it is necessary to reduce the number of man-hours or the number of steps needed to carry out the integrated circuit design process.
A conventional integrated circuit design device performs the design of an integrated circuit by using a floor plan display function and a timing analysis function. The floor plan display function is a function to display mounting blocks as the processing units and the display units. The timing analysis function is a function to calculate a simplified path delay based on the distance between the mounting blocks.
The conventional integrated circuit design device performs the design on a mounting-block basis by using the floor plan display function, and calculates and analyzes the delay between the arranged mounting blocks by using the timing analysis function. And such procedures are repeated such that the calculated delay approaches the desired delay.
Moreover, in the design using the hardware description language, the delay information that is used at the time of circuit composition, such as the number of cells and the gate delay, is utilized for the timing analysis in the floor plan.
However, the processing unit with which the conventional integrated circuit design device performs is the mounting block. The scale of the logic circuits in the mounting block amounts to hundreds of thousands gates. When the integrated circuit design process is performed on a mounting-block basis, the processing time needed is considerably large, and the accuracy of the analysis result by the timing analysis function deteriorates, which causes the error between the timing analysis result and the actual design to become large. For this reason, the re-design or design change work must be frequently performed in order to make the calculated delay approach a desired level as closely as possible. This prevents the reduction of the number of man-hours or the number of steps needed for the integrated circuit design process.